a. Field of the Invention
The present invention pertains generally to electronic devices having communication interfaces and specifically to testing and verification of communication interfaces.
b. Description of the Background
High speed communications interfaces are commonplace in today's computers. Ever increasing data rates make testing and verifying the communications interfaces increasingly difficult. Often, very expensive and costly test equipment is required to perform various tests needed to debug the interface as well as certify compliance with interoperability standards.
A common method for testing is to configure the device under test (DUT) with an internal loopback. The loopback may take data received on one port and relay the data out another port. Generally, the DUT performs little or no processing of the data during the test. A piece of expensive test equipment can be used to generate the data stream that is sent to the DUT, then analyze the returned data stream to check if the data were transmitted without error.
When errors are detected using the loopback method, it is impossible to detect whether the errors occurred on the receive side or transmit side of the DUT. The design engineer or technician often has a very difficult time isolating the problem.
Further, the transmit and receive channels of the DUT cannot be tested independently. In some cases, the various channels may have different performance standards to maintain, which is impossible to fully exercise when one channel has a lower performance capability than another.
It would therefore be advantageous to provide a system and method to test a device having multiple communication channels simultaneously yet being able to determine if errors occurred in a transmit channel or receive channel. It would be further advantageous if such a system further enabled testing of transmit and receive channels separately.